fathipour's picture

Morteza Fathi-Pour

Associate Professor
Phone.Number: 61114329
Email: mfathi [AT] ut.ac.ir

Research Interests

Process and Device Simulation
Flat Panel Displays, Integrated Circuit Design

Current Researches

Electron Beam Lithography
SOI Device Design
Micro Electronics Devices
Development Of Process and Device Simulation Software for Semiconductor Devices


The Theory and Technology of Semiconductor Devices (1)
The Theory and Technology of Semiconductor Devices (2)
Physical electronics Modern Physics

Selected Publications

1) Yannis P. Tsividis "Operation and Modeling of the MOS Transistor", Tehran University Publication, 827 Pages, 1998, Translated in to Persian by M. Fathipour

2) Jaspirit Singh "An Introduction to Semiconductor Devices", Tehran University Press, 825 Pages, 2002, Translated in to Persian by M. Fathipour and A.E. Ardakani

3) Electronic Circuit Simulation with Star HSpice, Salekan Publishing 208 Pages, 2003, Translated and Compiled by M. Fathipour and M. Gholipour

4) M. Fathipour "Laser Enhanced Chemical Vapor Deposited SiO2 InP Interface" Ph.D. dissertation Colorado State University. 1984.

5) E.Fathi, A.Behnam, P.Hashemi, B.Esfandyarpour, M.Fathipour. "The Influence of Stacked and Double Material Gate Structure on the Short Channel Effects in SOI MOSFET" IEICE Transaction on Electronics. Vol.E88-C No.6. pp.1122, June 2005.

6) R.Tarigat, A.Goodarzi, Sh Mohajerzadeh, B,Arvan, M.R.Gaderi, M.Fathipour. "Realization of Flexible Plasma Display on PET Substrates". Proceedings of the IEEE, Vol 93, No.7, pp.1. July 2005.

7) D.Shahrejerdi, M.Fathipour, B.Hekmatshoar and A.Khakifirooz, "A Lateral Structure for Low-cost Fabrication of COOLMOSTM " Journal of Solid State Electronics. Vol.48, pp.1953-1957, 2004.

8) M.Fathipour, E.Fathi, B.Afzal, A.Khakifirooz "An Improved Shift – and – Ratio Leff Extraction method for MOS Transistors with Halo/Pocket Implants" Journal of Solid State Electronics . Vol.48, PP.1829-1832, 2004.

9) M. Fathipour, A. Nicktash, C. Locus, "Recognition of the Irregular Patterns in the Fabrication Process of Semiconductor Devices, Using Neural Networks", Journal of Faculty of Engineering University of Tehran, Vol.34, No.2, pp.11, Sept. 2000.

10) M. Fathipour, M.J Sharifi, "Extraction of model Parameter for Semiconductor Devices". Yavar, PP. 39 No .4. 1997

11) M. Fathipour, etal. "Photo Enhanced Thermal Oxidation of InP", J. Appl. Physics, 57(2) PP. 637. 1985.

12) C.W. Wilmsem, J. Wager, Geib, T. Hwong and M. Fathipour, "Traps at the Insulator/Inp Interface – A Discussion of a Possible Cause", Thin Solid Films(103), 1983.

13) S.M.Goodnick, M. Fathipour, D. Elsworth, C.W. Wilmsen, "The Effect of a Thin Oxide Layer on Metal Semiconductor Contacts" ,J.Vac Sci. 18, 1980.

14) F.Farbiz, Y.Mortazavi, M.Fathipour, E.Fathi. "Investigation of Gate Tunneling Leakage Current in a Novel Fully Depleted SOI MOSFET with a Thin Oxide". International Semiconductor Device Symposium (ISDRS) , University of Maryland, Champaign IL U.S.A, Dec 2005.

15) Y.Mortazavi, M.Fathipour, E.Fathi, F.Farbiz. "Investigation of Gate Leakage in a Novel SOI MOSFET" Proceedings of 13th ICEE 2005, pp.440, Vol. 1,Zanjan, Iran, May 10-12, 2005.

16) A.R.Khorami, M.Fathipour, M.Mofidi. "Investigation of Argon Partial Pressure on the Performance of Plasma Flat Panel Displays." 13th ICEE 2005, pp.91, Vol.1, Zanjan, Iran, May 10-12, 2005.

17) J.Kousorkhi, M.Fathipour, E.Arzai, B.Esfandyar Pour. "Calculation of Velocity of Carriers in Nano Scale Balestic DG-MOSFETs". Proceeding of 7th Dense Matter Iranian Physics Society. Pp.30, University of Science and Technology, Tehran. Feb 2005.

18) B.Esfandyar pour, Y.Mortazavi, M.Fathipour, E.Fathi, A.Behnam. "Field Induced Barrier lowering (FIBL) in Nano Scale MOSFETs with high Gate Dielectric Constant". Proceeding of 7th Conference on Dense Matter, Iranian Physics Society. Pp.305, University of Science and Technology Feb.2005.

19) M.Fathipour, Shirin.Ghanbari, E.Arzai. "An Study of Halo Implant on the Nano Scale MOSFET Performance" Iranian Physics Conference Khoram Abad, University of Lorestan. Aug 29 2005.

20) A.Behnam, E.Fathi, P.Hashemi, B.Esfandyarpour, M.Fathipour. "The Influence of the Stacked and Double Material Gate Structures on the Short Channel Effects in SOI MOSFETs". Pp.68, IEEE ICM Moraco 2004.

21) M. Moghaddam, M. Fathipour, E.Fathi and N.Massumi. "Extracting of Substrate Network Resistance in RFCMOS". Topical Meeting on Si Monolitic Integrated Circuits in RF Systems. Atlanta, Georgia, pp.219, IEEE 2004.

22) M. Moghadam, E. Fathi, N.Massumi, M.Fathipour, Mortazavi and M.R.Ghaderi. "A New Methodology for Substrate Network Resistance Extraction in RF CMOS". ANTEM 2004. pp.71, URSI, Ottawa on Canada, July 20, 2004.

23) E.Fathi, B. Afzal and M. Fathipour. "Effective Channel Length Extraction of MOS Transistors with Halo/Pocket Implants"Mashhad, Iran, pp.168, ICEE May 2004.

24) E. Fathi, B. Afzal, M. Fathipour, A. Khaki Firooz "An Improved Shift - and - Ratio Leff Extraction Method for MOS Transistors. with Halo Implants". International Semiconductor Device Research Conference, pp.430, 2003

25) D. Shahrejerdi, B Hekmat Shoar Tabary, M. Fathipour and A. Khaki Firooz "An Approach to Low Cost Fabrication of Lateral COOLMOS Structures" International Semiconductor Device Research Conference, pp.272, 2003.

26) M.Y. Azizi, A. Saeedfar, O. Shoaei and M. Fathipour, "Analysis of Thermal Noise in Very Low Voltage Pipeline ADC’s "pp. 446, ICEE May 2003.

27) S. Delshadpour, M.Fathipour, "A method for Assiging Analog Weight in Nural Networks" ,pp.7, ICEE May 1999.

28) M.Fathipour, G.Gholami Zahed. "An Study of I2L Structure without on Epitaxial Emitter" 7th ICEE, pp.125, ITRC, Tehran Iran, 1999.

29) M. Sharifi, M. Fathipour, "Optical Modeling of Quantum Effects in the Tunneling Diodes" Sharif University of Technology Tehran, pp.101, ICEE May 1998.

30) K. Moaber, M. Fathipour, "A Response Surface Model For Controlling Fabrication Process in Semiconductor Devices", ICEE May 1998.

31) K. Moaber, M. Fathipour, "An Investigation in to Mesh Generation for Semiconductor Devices". Pp.137, ICEE May 1998.

32) M. Hosein Abadi, M. Fathipour, "Modeling of Boron Pre-deposition Step using Neural Networks and Multi Response Surface". pp.10, ICEE May 1996.

33) K. Moaber, M. Fathipour, "Controlling the Diffusion of Boron into Silicon during Predeposition" . pp.23, ICEE May 1996.

34) M. Fathipour, M. Ghandchi, "Design of n+p?n+ Power Transistors". Pp.38, ICEE MAY 1996.

35) M. Hosein Abadi, M. Fathipour, Caro Luccas, "A Model for Run By Run Control of Semiconductor Processes", International Conference on Expert and intelligent Systems. pp.1, Sept, 1995.

36) Sotoodeh and M. Fathipour, "Calculation of Contact Currents in Two-Dimensional Simulation of Bipolar Transistors", pp.50, ICEE1995.

37) F. Tahami, and M. Fathipour, "Design Equations For Optimization of Epitaxial Layer in Double Diffused Bipolar Transistors ", pp.10, ICEE, 1994.

38) F. Tahami and M. Fathipour, "BiCAD: A Simulation Software for Design of Fabrication Process of the Bipolar Transistor", pp.56, ICEE 1994.

39) A. Ehsani Ardakani, M. Fathipour, "Reverse Engineering of Wide Band Amplifier IC-733", pp.47, ICEE 1993.

40) M. Raesean, and M. Fathipour, "Two Dimensional Simulation of Impurity Diffusion into Silicon, as applied to Fabrication of Integrated Circuits" Iran Physics Conference, pp. 98, Sept. (1992).

41) M.Fathipour, M. Amini. "Fabrication of Optical Fibers using MOCVD method: Theory and Technology". Iran Physics Conference, Sept. (1990)

42) R. Vatan, H. Rezae Homami, M. Fathipour. "One-Dimensional Simulation of Bipolar Semiconductor Devices in Steady State, using Personal Computers". Iran Physics Conference, pp. 24, Sept. (1990).