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University of Tehran
College of Engineering
Zainalabedin Navabi

Zainalabedin Navabi


School of Electrical & Computer Engineering
Professor
Email: navabi [AT] ece.neu.edu
Personal Website:
Education
Ph.D.: Electrical Engineng, University of Arizona, 1981
M.Sc.: Electrical Engineering, University of Arizona, 1978
B.Sc.: Electrical Engineering, University of Texas, 1975

Research Interests
Test and Testable Design
Changing Syllabus of Foundation of Computer Programming Course
CAD for Digital Systems
System Level(ESL)Design and Modeling
VLSI Design Methodology
Object Oriented Programming

Current Researches
Concurrent Testing
SoC Test Methods
Transaction Level Design
Configurable Hardware/Software Design

Courses
Digital Design With HDL
Embedded Systems
Test and Testable Design

Selected Publications
1) Z.Navabi, "Verilog Computer-Based Training Course", McGraw Hill Company, N.Y.,New Yourk, 2002, ISBN:0-07-137473-6.

2) Z.Navabi,"Digital Design and Implementation with Field Programmable Devices", Springer Publishers, 2004, ISBN:1-4020-8011-5.

3) Z.Navabi, "Verilog Digital System Design", Second Edition. McGraw Hill Company, N.Y., New Yourk, 2006, ISBN:0-07-144564-1.

4) Zainalabedin Navabi with S. Shamshiri and H.Esmaeilzadeh, "Instruction- Level Test Methodology for CPU Core Self-Testing", ACM Transactions on Design Automation of Electronic Systems, Vol.10, No.4, Oct.2005.

5) Zainalabedin Navabi with M. Saneei, A. Afzali-Kusha, "Sign Bit Reduction Encoding for Low Power applications", Design Automation Conference(DAC)2005, Anaheim, CA,June13-17 2005.

6) Zainalabedin Navabi with Sh. Sharifi, J. Jafari, M. Hosseinabady and A. Afzali-Kusha, " Simultaneous Reduction of Dynamic and Static Power in Scan Structures", DATE 2005, March 7-11, Munich, Germany.

7) Zainalabedin Navabi with Shahrzad Mirkhani "Enhancing Fault Simulation Performance by Dynamic Fault Clustering", Asian Test Symposium (ATS"5), pp. 278-283, Dec. 18-21, 2005, Calcutta, India.

8) Zainalabedin Navabi with Ehsan Atoofian, "A Test Approach for Look-Up Table Based FPGAs", Journal of Computer Science and Technology", Kluwer Boston Inc., Vol. 21, No.1,pp. 141-146, Jan.2006.