M.Sc. Candidate, Electronics-Systems design
School of Electrical and Computer Engineering
I received my B.Sc. degree in Electrical Engineering in
of Technology in 2004. I am currently studying towards M.Sc. in Sharif University . Tehran University
2004 – now: M. Sc., Electronics,
VLSI design : system level design of communication systems
Bit true modeling: bit true modeling of communication systems
Wireless Networks: 802.11b/g/a/n/e and 802.16
MIMO systems: hardware design challenges
Research and Work Experience:
· 2006 Instructor of :
Electronics 1 Laboratory
Electronics 2 Laboratory
Digital Electronics laboratory
in Sadra Institute for Higher Education
· 2005-2006 Instructor of Digital Electronics Laboratory in Sadra Institute for
1. Z. Pajouhi, S. M. Fakhraie, “Performance analysis of a time-domain equalizer in a WiMax system” , to be published in the Iranian Conference on Electrical Engineering”, 15-17 May 2007.
2. E. Rahmani, Z. Pajouhi, N. K. Amiri and A. A. Kusha,” Modified Leakage-Biased Domino Circuit with Low-Power and Low-Delay Characteristics”, to be published in International Conference on Microelectronics (ICM), 16-19 Dec. 2006 [download].
3. Z. Pajouhi, S. M. Fakhraie,”A Novel Neural Network GA-Optimized Controller for QoS Support in Wireless MACs” published in Asian Conference on Circuits and Systems APCCAS 2006, 3-7 Dec. 2006 [download].
1. "A Novel Neural Network GA-Optimized Controller for QoS Support in Wireless MACs", presented in Asian Conference on Circuits and Systems APCCAS 2006, 7 Dec. 2006 [download]
2."Echo Cancellation Using Genetic Algorithm and Combined GA-LMS Method" , presented in Asian Conference on Circuits and Systems APCCAS 2006, 7 Dec. 2006 [download].
As the usage of WLANs have boosted in the recent years, the standards need to keep up with the high throughput demand of the users. Based on this assumption, the new WLAN standard "Next generation WLAN" also called 802.11n in technical literature was introduced. This standard has not been finalized yet and different research groups are working on this topic.
In our research, we take the hardware design and challenges into consideration. The system level design starts with float system modeling and then goes through bit true modeling and hardware implementation.