مقالات علمی چاپ شده در مجلات

1. "Automatic Correction of Arithmetic Circuits in the Presence of Multiple Bugs by Groebner Basis Modification"
   Negar Aghapour Sabbagh, Bijan Alizadehmalafeh
   ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, Vol. 29, No 5, 2024
2. "Concealing Exposed Circuit Features Through a MaxSAT-Based Logic Locking Method"
   Mohammad Moradi Shahmiri, Bijan Alizadehmalafeh
   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, Vol. 71, No 4, pp.1-1, 2024
3. "Systematic Trojan Detection in Crypto-Systems using the Model Checker"
   Hamed Hosseintalaee, Ali Jahanian, Bijan Alizadehmalafeh
   JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, Vol. 33, No 3, 2024
4. "An FPGA-based Hardware Architecture for P+M class PMU using Accuracy-aware O-spline Filter Selection and Modulation Detection"
   Ali Falahati, Mahdieh Shamirzaei, Bijan Alizadehmalafeh
   IEEE Transactions on Instrumentation and Measurement, Vol. 73, 2024
5. "HyLock: Hybrid Logic Locking Based on Structural Fuzzing for Resisting Learning-based Attacks"
   Mohammad Moradi, Bijan Alizadehmalafeh
   The ISC International Journal of Information Security (ISeCure)), Vol. 15, No 3, pp.1-7, 2023
6. "DC-PUF: Machine Learning-Resistant PUF-Based Authentication Protocol Using Dependency Chain for Resource-Constraint IoT Devices"
   Abolfazl Sajady, Ahmad Shabani, Bijan Alizadehmalafeh
   JOURNAL OF NETWORK AND COMPUTER APPLICATIONS, Vol. 217, No 8, 2023
7. "Automatic Correction of RTL Designs using A Lightweight Partial High Level Synthesis"
   Bijan Alizadehmalafeh, Masoud Shiroei
   INTEGRATION-THE VLSI JOURNAL, Vol. 91, No 7, pp.173-181, 2023
8. "Mutual Lightweight PUF-Based Authentication Scheme Using Random Key Management Mechanism for Resource-Constrained IoT Devices"
   Amir Ashtari, Ahmad Shabani, Bijan Alizadehmalafeh
   ISeCure-ISC International Journal of Information Security, Vol. 14, No 3, pp.1-8, 2022
9. "A Comparative Study of Machine Learning Classifiers for Secure RF-PUF-Based Authentication in Internet of Things"
   amir Ashtari, ahmad Shabani, Bijan Alizadehmalafeh
   MICROPROCESSORS AND MICROSYSTEMS, Vol. 93, No 1, 2022
10. "Hardware Patching Methodology for Neutralizing Timing Hardware Trojans Using Vulnerability Analysis and Time Borrowing Scheme"
    Fatemeh Khormizi, Ahmad Shabani, Bijan Alizadehmalafeh
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, Vol. 1, No 1, pp.1-1, 2022
11. "SAT-Based Integrated Hardware Trojan Detection and Localization Approach Through Path-Delay Analysis"
    Mohammad Sabri, Ahmad Shabani, Bijan Alizadehmalafeh
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, Vol. 68, No 5, 2021
12. "PODEM: A low-cost property-based design modification for detecting Hardware Trojans in resource-constraint IoT devices"
    Ahmad Shabani, Bijan Alizadehmalafeh
    JOURNAL OF NETWORK AND COMPUTER APPLICATIONS, Vol. 167, No 1, 2020
13. "Incremental SAT-based Correction of Gate Level Circuits by Reusing Partially Corrected Circuits"
    Bijan Alizadehmalafeh, Yasaman Abadi
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, Vol. 67, No 6, 2020
14. "PMTP: A MAX-SAT-Based Approach to Detect Hardware Trojan Using Propagation of Maximum Transition Probability"
    Ahmad Shabani, Bijan Alizadehmalafeh
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, Vol. 39, No 1, pp.25-33, 2020
15. "Combinational Hybrid Signal Selection with Updated Reachability Lists for Post-Silicon Debug"
    Siamack Beigmohammadi, Bijan Alizadehmalafeh
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, Vol. 11, No 1, 2019
16. "Data-path aware high-level ECO synthesis"
    Masoud Shiroie, Bijan Alizadehmalafeh, masahiro Fujita
    INTEGRATION-THE VLSI JOURNAL, Vol. 65, No 1, pp.88-96, 2019
17. "QBF-Based Post-Silicon Debug of Speed-Paths Under Timing Variations"
    Bijan Alizadehmalafeh, Mehdi Shakeri
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol. 65, No 12, pp.4326-4335, 2018
18. "FPGA-Based Implementation of a Novel Method for Estimating the Brillouin Frequency Shift in BOTDA and BOTDR Sensors"
    Mojtaba Abbasnejad, Bijan Alizadehmalafeh
    IEEE SENSORS JOURNAL, Vol. 18, No 5, pp.2015-2022, 2018
19. "A Dynamic Timing Error Avoidance Technique Using Prediction Logic in High-Performance Designs"
    Mehrnaz Ahmady, Sahand Salamat, Bijan Alizadehmalafeh
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, Vol. 27, No 3, pp.1-4, 2018
20. "Scalable Symbolic Simulation-Based Automatic Correction of Modern Processors"
    Fatemeh Refan, Bijan Alizadehmalafeh, Zainalabedin Navabi Shirazi
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, Vol. 18, No 6, pp.1-9, 2018
21. "FPGA-Based Implementation of an Artificial Neural Network for Measurement Acceleration in BOTDA Sensors"
    Mojtaba Abbasnejad, Bijan Alizadehmalafeh
    IEEE Transactions on Instrumentation and Measurement, Vol. 68, No 5, pp.1-9, 2018
22. "Incremental SAT-based Accurate Auto-correction of Sequential Circuits through Automatic Test Pattern Generation"
    Bijan Alizadehmalafeh, Reza Sharafinejad
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, Vol. 18, No 5, pp.1-1, 2018
23. "A Resource-limited Hardware Accelerator for Convolutional Neural Networks in Embedded Vision Applications"
    Shayan Moeini, Bijan Alizadehmalafeh, Mohammad Emad, Reza Ebrahimpour
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, Vol. 64, No 10, pp.1217-1222, 2017
24. "Systematic Design Space Exploration of Floating Point Expressions on FPGA"
    Alireza Mahzoon, Bijan Alizadehmalafeh
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, Vol. 64, No 3, pp.274-278, 2017
25. "OptiFEX: A Framework for Exploring Area-Efficient Floating Point Expressions on FPGAs with Optimized Exponent/Mantissa Widths"
    Alireza Mahzoon, Bijan Alizadehmalafeh
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, Vol. 25, No 1, pp.198-209, 2017
26. "Scalable SMT-based Equivalence Checking of Nested Loop Pipelining in Behavioral Synthesis"
    Mohammad Reza Azarbad, Bijan Alizadehmalafeh
    ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, Vol. 22, No 2, 2016
27. "A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the presence of Variations"
    Mehrnaz Ahmadi, Bijan Alizadehmalafeh, Behjat Forouzandeh
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol. 1, No 1, pp.111-120, 2016
28. "Genetic Algorithm Based FPGA Architectural Exploration using Analytical Models"
    Hossein Mehri, Bijan Alizadehmalafeh
    ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, Vol. 22, No 1, 2016
29. "UAFEA: Unified Analytical Framework for IA/AA-based Error Analysis of Fixed-Point Polynomial Specifications"
    Mahdieh Graeilo, Bijan Alizadehmalafeh, Behjat Forouzandeh
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, Vol. 20, No 6, pp.220-226, 2016
30. "A dynamic specification to automatically debug and correct various divider circuits"
    Hashem Haghbayan, Bijan Alizadehmalafeh
    INTEGRATION-THE VLSI JOURNAL, Vol. 53, No 2016, pp.100-114, 2016
31. "Analytical performance model for FPGA-based reconfigurable computing"
    Hossein Mehri, Bijan Alizadehmalafeh
    MICROPROCESSORS AND MICROSYSTEMS, Vol. 39, No 8, pp.796-806, 2015
32. "A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs"
    Bijan Alizadehmalafeh, Payman Behnam, Somayeh Sadeghi
    IEEE TRANSACTIONS ON COMPUTERS, Vol. 64, No 6, pp.1564-1578, 2015
33. "Automatic High-Level Data-Flow Synthesis and Optimization of Polynomial Datapaths Using Functional Decomposition"
    Samaneh Ghandali, Bijan Alizadehmalafeh, Masahiro Fujita, Zainalabedin Navabi Shirazi
    IEEE TRANSACTIONS ON COMPUTERS, Vol. 64, No 6, pp.1579-1593, 2015
34. "Groebner basis based formal verification of large arithmetic circuits using Gaussian elimination and cone-based polynomial extraction"
    Farimah Farahmandi, Bijan Alizadehmalafeh
    MICROPROCESSORS AND MICROSYSTEMS, Vol. 2, No 39, pp.83-96, 2015
35. "اSQ-PUF: پروتکل احراز هویت مبتنی برPUF مقاوم در برابر حملات یادگیری ماشین"
    سید ابوالفضل سجادی هزاوه، بیژن علیزاده ملفه
    نشریه مهندسی برق و مهندسی کامپیوتر ایران، نسخه 21، شماره 3، 1402
36. "آنالیز آسیب‌پذیری مدارهای دیجیتال در برابر تروجان سخت‌افزار زمانی مبتنی بر عملگر خازنی"
    فاطمه خورمیزی، بیژن علیزاده ملفه
    امنیت فضای تولید و تبادل اطلاعات (منادی)، نسخه 20، شماره 1، صفحات:18-25، 1401
37. "مدل عملکردی تحلیلی FPGA برای پردازش با قابلیت پیکربندی مجدد"
    حسین مهری، بیژن علیزاده ملفه
    انجمن مهندسین برق-الکترونیک ایران، نسخه 13، شماره 4، صفحات:1-13، 1395

مقالات علمی ارائه شده در همایش‌ها

1. "Mutual Lightweight PUF-Based Authentication Scheme Using Random Key Management Machanism for Resource-Constrained IoT Devices"
   Amir Ashtari, Ahmad Shabani, Bijan Alizadehmalafeh
   19th International ISC Conference on Information Security and Cryptology (ISCISC’2022), 2022
2. "Arithmetic Circuit Correction by Adding Optimized Correctors Based on Groebner Basis Computation"
   Negar Aghapour Sabbagh, Bijan Alizadehmalafeh
   26th IEEE European Test Symposium, 2021
3. "A New RF-PUF Based Authentication of Internet of Things Using Random Forest Classification"
   Amir Ashtari, Ahmad Shabani, Bijan Alizadehmalafeh
   2019 16th International ISC (Iranian Society of Cryptology) Conference on Information Security and Cryptology (ISCISC), 2019
4. "High-Level Synthesis of Non-Rectangular Multi-Dimensional Nested Loops Using Reshaping and Vectorization"
   Sahand Salamat, Mohammadreza Azarbad, Bijan Alizadehmalafeh
   IEEE International Conference on Rebooting Computing, 2018
5. "Systematic Approximate Logic Optimization Using Don’t Care Conditions"
   Sahand Salamat, Mehrnaz Ahmadi, Bijan Alizadehmalafeh, Masahiro Fujita
   ISQED, 2017
6. "Combinational Trace Signal Selection with Improved State Restoration for Post-Silicon Debug"
   Siamack Beigmohammadi, Bijan Alizadehmalafeh
   DATE 2016, 2016
7. "Formally Analyzing Fault Tolerance in Datapath Designs using Equivalence Checking"
   Payman Behnam, Bijan Alizadehmalafeh, Sajjad Taheri, ماساهیرو فوجیتا
   ASPDAC 2016, 2016
8. "In-circuit Mutation-based Automatic Correction of Certain Design Errors Using SAT Mechanisms"
   Payman Behnam, Bijan Alizadehmalafeh
   ATS 2015, 2015
9. "Multi-objective Optimization of Floating Point Arithmetic Expressions Using Iterative Factorization"
   Alireza Mahzoon, Bijan Alizadehmalafeh
   ISVLSI 2015, 2015
10. "A Timing Error Mitigation Technique for High Performance Designs"
    Mehrnaz Ahmadi, Bijan Alizadehmalafeh, Behjat Forouzandeh
    ISVLSI 2015, 2015
11. "HOFEX: High Level Optimization of Floating Point Expressions for Implementation on FPGAs"
    Alireza Mahzoon, Bijan Alizadehmalafeh, ماساهیرو فوجیتا
    IWLS 2015, 2015
12. "UPF-based formal verification of low power techniques in modern processors"
    Reza Sharafinejad, Bijan Alizadehmalafeh, ماساهیرو فوجیتا
    IEEE VLSI Test Symposium (VTS 2015), 2015
13. "Automated formal approach for debugging dividers using dynamic specification"
    Mohammad Hashem Haghbayan, Bijan Alizadehmalafeh, Amir Rahmani, Pasi Liljeberg, Hannu Tenhunnen
    IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014, 2014
14. "A low-power enhanced bitmask-dictionary scheme for test data compression"
    Vahid Janfaza, Payman Behnam, Behjat Forouzandeh, Bijan Alizadehmalafeh
    ISVLSI 2014, 2014
15. "An analytical dynamic and leakage power model for FPGAs"
    Hossein Mehri, Bijan Alizadehmalafeh
    ICEE 2014, 2014
16. "RTL Datapath Optimization Using System Level Transformations"
    Samaneh Ghandali, Bijan Alizadehmalafeh, Masahiro Fujita, Zainalabedin Navabi Shirazi
    ISQED, 2014
17. "Formal Verification and Debugging of Array Dividers with Auto-correction Mechanism"
    Hashem Haghbayan, Bijan Alizadehmalafeh, Payman Behnam, Saeed Safari
    VLSI Design, 2014
18. "Optimization of Modular Multiplication on FPGA Using Don’t Care Conditions"
    Bijan Alizadehmalafeh, Masahiro Fujita
    ICFPT, 2009
19. "Improved Heuristics for Finite Word-Length Polynomial Datapath Optimization"
    Bijan Alizadehmalafeh, Masahiro Fujita
    ICCAD, 2009
20. "آنالیز آسیب پذیری مدارهای دیجیتال در برابر تروجان سخت افزار زمانی مبتنی بر عملگر خازنی"
    فاطمه خورمیزی، بیژن علیزاده ملفه
    18 امین کنفرانس بین المللی انجمن رمز ایران، 1400